Introduction To multilayer PCB Stack-up Design

The layering design of PCB is not a simple stacking of layers, in which the arrangement of layers is the key, which is closely related to the arrangement and trend of signals. In addition to adding the necessary signal routing layer, the most important thing is to arrange the independent power source and layer (copper layer) compared with the ordinary PCB. In high-speed digital circuit systems, the advantages of using power and formation to replace the former power and ground bus are mainly as follows:

1) Provide a stable reference voltage for digital signal transformation.

2) Apply power uniformly to each logic device at the same time.

3) Effectively suppress crosstalk between signals.

The reason is that the use of a large area of copper as the power layer and the formation greatly reduces the resistance between the power layer and the ground so that the voltage on the power layer is uniform and stable, and each signal line can be guaranteed to have a close ground plane relative, which also reduces the characteristic impedance of the signal line and effectively reduces crosswalk. Therefore, for some high-end high-speed circuit designs, it has been explicitly stipulated that six (or more) layer schemes must be used, such as Intel’s requirement for PC133 memory module PCB. This is mainly because considering the electrical characteristics of multilayer boards, as well as the inhibition of electromagnetic radiation, and even the ability to resist physical and mechanical damage are significantly better than the low number of PCB.

In general, the lamination design is carried out according to the following principles: to meet the requirements of characteristic impedance; It satisfies the minimization principle of signal circuit. Meet the requirement of minimizing signal interference in PCB; Satisfies the principle of symmetry. To be specific, the following aspects should be paid attention to when designing multilayer boards:

1) A signal layer should be adjacent to a copper coating layer. The signal layer and the copper coating layer should be placed separately. It is better that each signal layer can be adjacent to at least one copper coating layer. The signal layer should be tightly coupled to the adjacent copper layer (i.e. the medium thickness between the signal layer and the adjacent copper layer is small).

2) Power layer copper and ground copper should be tightly coupled and located in the middle of the stack. Shortening the distance between the power layer and formation is beneficial to the stability of the power layer and reducing EMI. Try to avoid sandwiching the signal layer between the power layer and the formation. The close proximity of the power layer plane to the ground plane is like forming a flat capacitance. The closer the two planes are, the larger the capacitance value will be. The primary function of the capacitor is to provide a low impedance backflow path for high-frequency noise (such as switching noise), resulting in a smaller ripple in the receiving device’s power input and enhanced performance of the receiving device itself.

3) In the case of high speed, extra layers can be added to isolate the signal layer. Multiple ground copper layers can effectively reduce the impedance of PCB and the common mode EMI. However, it is recommended not to add more power layer to isolate, which may cause unnecessary noise interference.

4) The high-speed signals in the system should be interlayer and between two copper compresses, so that the two copper compresses can provide shielding for these high-speed signals and limit the radiation of these signals to the two copper compresses.

5) Give priority to the transmission line model of high-speed signals and clock signals, and design a complete reference plane for these signals to avoid cross-plane segmentation as far as possible, so as to control the characteristic impedance and ensure the integrity of signal backflow path.

6) The situation where the two signal layers are adjacent. For board CARDS with high-speed signals, the ideal lamination is to design a complete reference plane for each high-speed signal layer, but in practice, we always need to make a trade-off between the number of PCB layers and the cost of PCB. In this case, the phenomenon that two signal layers are adjacent cannot be avoided. The current approach is to make the space between the two signal layers increase and make the routing of the two layers as vertical as possible to avoid signal crosstalk between the layers.

7) The copper layer should be arranged in pairs. For example, the 2 and 5 layer, or 3 and 4 layers of the six layers should be laid together. This is due to the requirement of balanced structure in the process, because an unbalanced copper layer may lead to warping deformation of PCB.

8) The subsurface (that is, the layer immediately adjacent to the surface layer) is designed to be stratified to reduce EMI.

9) Estimated the required number of signal layers according to the DENSITY of PCB components and pin density, and determined the total number of layers.

The structure of the board is a very important factor to determine the EMC performance of the system. A good laminate structure can suppress the radiation in PCB effectively. In today’s common high – speed circuit system, most of the use of multi-laminates rather than a single or double-sided board.