Nine Rules for PCB Wiring (1)

Nine Rules for PCB Wiring:

1. Connection Simplification Principle

The connection should be streamlined, as short as possible, with as few turns as possible, and the lines should be simple and clear, especially in high-frequency circuits. Of course, there are exceptions to the lines that require special extensions in order to achieve impedance matching, such as snake walking lines.

2. Principle of Safe Current-Carrying

The width of the copper wire should be designed based on the current it can carry. The current-carrying capacity of the copper wire depends on the following factors: wire width, wire thickness (copper platinum thickness), allowable temperature rise, etc. The table below shows the relationship between the width and the area of copper wire and the conduction current (military standard), the wire width can be appropriately considered based on this basic relationship.

3. Principles of Electromagnetic Anti-Interference

The principle of electromagnetic anti-interference involves many knowledge points. For example, the corners of copper film wires should be rounded or beveled, because the right or sharp corners at high frequencies will affect the electrical performance. The wires on both sides of the double-sided board should be perpendicular to each other. Obliquely cross or bend the traces, try to avoid parallel traces, and reduce parasitic coupling.

1) Generally, there are various ground wires in an electronic system, such as digital ground, logic ground, system ground, chassis ground, etc. The design principles of ground wires are as follows:

a. Correct single-point and multi-point grounding

In the low-frequency circuit, the working frequency of the signal is less than 1MHZ, its wiring and the inductance between the devices have little influence, and the circulating current formed by the grounding circuit has a greater influence on the interference, so one point grounding should be adopted. When the signal working frequency is greater than 10MHZ, if one-point grounding is used, the length of the ground wire should not exceed 1/20 of the wavelength, otherwise the multi-point grounding method should be used.

b. Separate digital ground from analog ground

If there are both logic circuits and linear circuits on the circuit board, they should be separated as much as possible. Generally, the anti-interference ability of digital circuits is relatively strong. For example, the noise tolerance of TTL circuits is 0.4~0.6V, and the noise tolerance of CMOS circuits is 0.3~0.45 times of the power supply voltage. As long as the analog circuit has a small amount of noise, it is enough to make it work abnormally, so these two types of circuits should be placed and routed separately.

c. The grounding wire should be as thick as possible

If a very thin line is used for the ground wire, the ground potential will change with the change of the current, which will reduce the noise immunity. Therefore, the ground wire should be thickened so that it can pass three times the allowable current on the printed board. If possible, the grounding wire should be 2~3mm or more.

d. The ground wire forms a closed loop
For printed boards composed only of digital circuits, most of their grounding circuits are arranged in loops to improve the anti-noise capability. Because the ring ground can reduce the ground resistance, thereby reducing the ground potential difference.

2) Configure Decoupling Capacitor

One of the conventional methods of PCB design is to configure appropriate decoupling capacitors on each key part of the printed board. The general configuration principle of decoupling capacitors is:

a. The input end of the power supply is connected with an electrolytic capacitor of 10~100uf. If the position of the printed circuit board allows, the anti-interference effect of an electrolytic capacitor of more than 100uf will be better.

b. In principle, each integrated circuit chip should be equipped with a 0.01uf~`0.1uf ceramic capacitor. If the gap of the printed board is not enough, a 1~10uf tantalum capacitor can be arranged every 4~8 chips. Preferably electrolytic capacitors are not used. Electrolytic capacitors are rolled up with two layers of film. This rolled structure appears as an inductance at high frequencies. It is best to use tantalum capacitors or polycarbonate capacitors.

c. For devices with weak anti-noise ability and large power changes when shutting down, such as RAM and ROM storage devices, a decoupling capacitor should be directly connected between the power line and the ground line of the chip.

d. Capacitor leads should not be too long, especially for high-frequency bypass capacitors.

3) Via Design

In high-speed PCB design, seemingly simple vias often bring great negative effects to the design of the circuit. In order to reduce the adverse effects caused by the parasitic effects of vias, try the best to do in the design.

a. Considering the cost and signal quality, choose a reasonable size of the via hole. For example, for the 6-10 layer memory module PCB design, it is better to use 10/20mil (drilled/pad) vias. For some high-density small-size boards, you can also try to use 8/18mil vias hole. Under current technical conditions, it is difficult to use smaller-sized vias. When the depth of the hole exceeds 6 times the diameter of the drilled hole, it cannot be guaranteed that the hole wall can be evenly plated with copper. For the power or ground vias, consider using a larger size to reduce impedance.

b. The use of a thinner PCB board is beneficial to reduce the two parasitic parameters of the via.

c. Try not to change the layers of the signal traces on the PCB board, that is, try not to use unnecessary vias.

d. The power and ground pins should be drilled nearby, and the lead between the via and the pin should be as short as possible.

e. Place some grounded vias near the vias of the signal change layer to provide the nearest loop for the signal. It is even possible to place a large number of redundant ground vias on the PCB board.

4) Some experience in reducing noise and electromagnetic interference

a. Low-speed chips can be used instead of high-speed chips. High-speed chips are used in key places.

b. Use a resistor in series to reduce the jump rate of the upper and lower edges of the control circuit.

c. Try to provide some form of damping for relays, such as RC setting current damping.

d. Use the lowest frequency clock that meets the system requirements.

e. The clock should be as close as possible to the device using the clock, and the shell of the quartz crystal oscillator should be grounded.

f. Enclose the clock area with a ground wire and keep the clock wire as short as possible.

g. Do not route wires under the quartz crystal and under noise-sensitive devices.

h. Keep the clock, bus, and chip select signals away from I/O lines and connectors.

i. The clock line perpendicular to the I/O line has less interference than the parallel to the I/O line.

J. The I/O drive circuit should be as close as possible to the edge of the PCB, and let it leave the PCB as soon as possible. The signal entering the PCB should be filtered, and the signal from the high-noise area should also be filtered. At the same time, a series of terminal resistors should be used to reduce signal reflection.

k. The useless terminal of MCU should be connected to high, or grounded, or defined as the output terminal. The terminals of the integrated circuit that should be connected to power and ground should be connected, and should not be left floating.

l. Do not leave the input terminal of the gate circuit that is not in use. The positive input terminal of the unused op amp is grounded, and the negative input terminal is connected to the output terminal.

m. The printed board should try to use 45-fold lines instead of 90-fold lines for wiring to reduce the external emission and coupling of high-frequency signals.

n. The printed boards are partitioned according to frequency and current switching characteristics, and the distance between noise components and non-noise components is farther.

o. Use single-point power and single-point grounding for single and double panels, and the power line and ground line should be as thick as possible.

p. The analog voltage input line and reference voltage terminal should be as far away as possible from the digital circuit signal line, especially the clock.

q. For A/D devices, the digital part and the analog part should not be crossed.

r. The component pins should be as short as possible, and the same as the decoupling capacitor.

s. The key line should be as thick as possible, and protective ground should be added on both sides, and the high-speed line should be short and straight.

t. Do not parallel lines sensitive to noise with high-current, high-speed switching lines.

u. For weak signal circuits, do not form current loops around low frequency circuits.

v. Do not form a loop for any signal. If it is unavoidable, make the loop area as small as possible.

w. Each integrated circuit has a decoupling capacitor. A small high-frequency bypass capacitor must be added to each electrolytic capacitor.

x. Use large-capacity tantalum capacitors or juku capacitors instead of electrolytic capacitors as circuit charging and discharging energy storage capacitors. When using tubular capacitors, the shell should be grounded.

y. The signal line that is very sensitive to interference should be provided with a ground, which can effectively suppress crosstalk.

z. The signal is transmitted on the printed board, and its delay time should not be greater than the nominal delay time of all devices.