Via is one of the important components of multi-layer PCB, and the cost of drilling usually accounts for 30% to 40% of the cost of PCB board manufacturing. From a design point of view, a via is mainly composed of two parts, one is the drill hole in the middle, and the other is the pad area around the drill. The size of these two parts determines the size of the via.
Obviously, in the design of high-speed, high-density PCB, designers always hope that the smaller the via hole is, the better, so that more wiring space can be left on the board. In addition, the smaller the via hole, the parasitic capacitance of its own. The smaller it is, the more suitable it is for high-speed circuits.
However, the reduction in hole size also brings about an increase in cost, and the size of vias cannot be reduced indefinitely. It is limited by process technologies such as drilling and plating. The smaller the hole, the longer the hole drilling takes, the easier it is to deviate from the center position; and when the depth of the hole exceeds 6 times the diameter of the drilled hole, it cannot be guaranteed that the hole wall can be uniformly plated with copper.
Therefore, comprehensive design and production, we need to consider the following issues.
1.In principle, the inner diameter of the all-through hole should be 0.2mm (8mil) and above, and the outer diameter should be 0.4mm (16mil) or more. If there are difficulties, the outer diameter must be controlled to 0.35mm (14mil).
According to experience, the inner diameter and outer diameter of PCB commonly used via sizes generally follow X*2±2mil (X represents the inner diameter). For example, vias with an inner diameter of 8mil can be designed as 8/14mil, 8/16mil or 8/18mil; vias with 12mil can be designed as 12/22mil, 12/24mil, 12/26mil.
2. It is recommended not to use buried blind vias for BGA designs of 0.65mm and above, as the cost will increase significantly.
When using buried blind holes, generally use first-order blind holes (TOP layer-L2 layer or BOTTOM-negative L2). The inner diameter of the via is generally 0.1mm (4mil) and the outer diameter is 0.25mm (10mil).
3. Vias cannot be placed on pads smaller than the size of the 0402 resistor-capacitor pad.
Theoretically, the lead inductance is small when placed on the pad, but during production, the solder paste easily enters the via hole, causing uneven solder paste and causing the device to stand up (‘tombstone phenomenon). Generally recommended spacing is 4-8mil.
4. The distance between two vias should not be too close, as drilling is likely to cause holes.
Generally, the hole spacing is required to be 0.5mm and above, 0.35mm-0.4mm should be avoided as much as possible, 0.3mm and below are forbidden.
5. Except for heat dissipation vias, vias ≤0.5mm need to be plugged with oil (the inner diameter is 0.4mm and needs to be plugged).
1) Especially for devices with metal casings, no through-holes should be drilled under the main body. A certain plug hole should be filled with oil to avoid short circuit between the housing and the through-holes.
2) According to the board manufacturer’s production feedback, it is often mentioned that the vias under the BGA are too close to the pads, and the vias need to be moved.
This situation is caused by the fact that the vias are not equidistant from the BGA pads. Because the positions of the vias and test holes under the BAG are not equidistant from the BGA pads, it is a normal state that PCB designers do not pay attention to this, leading to constant engineering problems, and also a hidden danger to welding quality.
Therefore, we directly recommend drilling to the center of the two pads, especially in the BGA due to the small pitch pitch, after drilling, it is necessary to oil the via plugs under the BGA to avoid short circuits between the BGA balls and the tin. .
6. The fixed pads of the earphone terminal, buttons, FPC are used to prevent the copper skin of the pad from falling. If conditions permit, the pads are punched with 1-2 vias (the vias are evenly placed), which can effectively improve the “fixability” .
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